JPH0550143B2 - - Google Patents
Info
- Publication number
- JPH0550143B2 JPH0550143B2 JP22940388A JP22940388A JPH0550143B2 JP H0550143 B2 JPH0550143 B2 JP H0550143B2 JP 22940388 A JP22940388 A JP 22940388A JP 22940388 A JP22940388 A JP 22940388A JP H0550143 B2 JPH0550143 B2 JP H0550143B2
- Authority
- JP
- Japan
- Prior art keywords
- main
- clock line
- buffer
- buffers
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000872 buffer Substances 0.000 claims description 61
- 230000007423 decrease Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 2
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22940388A JPH0277150A (ja) | 1988-09-13 | 1988-09-13 | クロックライン駆動装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22940388A JPH0277150A (ja) | 1988-09-13 | 1988-09-13 | クロックライン駆動装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0277150A JPH0277150A (ja) | 1990-03-16 |
JPH0550143B2 true JPH0550143B2 (en]) | 1993-07-28 |
Family
ID=16891663
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP22940388A Granted JPH0277150A (ja) | 1988-09-13 | 1988-09-13 | クロックライン駆動装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0277150A (en]) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2930174B2 (ja) * | 1993-09-01 | 1999-08-03 | 日本電気株式会社 | 半導体集積回路装置 |
JP3753355B2 (ja) * | 1998-11-10 | 2006-03-08 | 株式会社ルネサステクノロジ | 半導体装置 |
JP2003132674A (ja) | 2001-10-26 | 2003-05-09 | Mitsubishi Electric Corp | 半導体記憶装置 |
KR100429891B1 (ko) * | 2002-07-29 | 2004-05-03 | 삼성전자주식회사 | 클럭 스큐를 최소화하기 위한 격자형 클럭 분배망 |
-
1988
- 1988-09-13 JP JP22940388A patent/JPH0277150A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH0277150A (ja) | 1990-03-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |